Dynamic Simulation Control (DSC)
The dynamic simulation control (DSC) enables to maneuver and monitor the register, memory, and field values at run time. The DSC is similar to Java applet in a sense that DSC is an embedded code section inside test case, and it is interpreted and executed at run time. The DSC statements constitute an independent thread. The program control enters into the DSC block at simulation time 0, and the termination occurs with either the complete execution of DSC statements or explicit exit primitive provided.
The operands in DSC statements consist of properties defined in SDL, variables provided for computation convenience, and numerical and character string constants. In order to allow flexibility and simplicity in expression, the DSC statements are dynamically tied in that type of variables is determined from usage at run time such as Java. Along with arithmetic and logic expressions, timing operations such as cycle delay and waiting for an event are supported. Also, memory utility functions facilitate memory handling. DSC enables verification engineer to arbitrarily control SoC configuration using built-in command in terms of execution time and counts. Such feature is very helpful for hardware reset test in which the assertion of reset signal and configuration has to be carried out multiple times. The DSC block is open to external world by calling user-defined functions written in high-level languages such as C. Such an expressive power and abundant user-friendly functionality, the DSC plays a core role in test case buildup.
Note that DSC statements are preprocessed at simulation time 0 to detect syntax errors as early as possible instead of waiting for interpretation to hit during simulation or emulation. In practice, such a late exception handling occasionally happens in script based test environment. For example, corruptive syntax error shows up after a few hours or days of execution in a Tcl based environment incurring significant waste of time and resources for test case creation.
Just like other static property definitions in SDL, the DSC block is inheritable to chip instances if the block is defined under meta-chip object. In other words, a DSC block under a meta-chip with multiple chip instances represents multiple DSC threads executed in each instance. Furthermore, multiple DSC blocks can be defined within a chip that runs in different threads concurrently if necessary.
One of typical applications of the DSC statements is chip bring-up test. In such test, bus reads and writes statements with certain address simply enable to check whether the chip is alive and react properly. Also, the data flow statistics are easily collected at run time that is used to compare with pre-computed signature and eventually to pinpoint the problematic block in emulation and hardware prototype test.