Design Interface Module (DIM)

Tarek provides two types of DIMs, DIM-E represents the emulatable DIM (running on emulation environment) and DIM-V represents behavior DIM (Verilog or ESL C model). The DIMs are specially designed so that DIM-E is 100% functional equivalent to DIM-V, therefore the same normal, corner and error test cases can run with a Verilog simulator or on any emulator without modification.

The DIM-E is a DMA-based hardware adapter with has superior performance and flexible interfaces. For Ethernet ASIC, DIM-E supports up to 16 X/G/MII ports per link. The ports and links are also scalable. Comparing to other available speed bridge adapters on the market that supports 8 MII, 4 GMII ports or 1XGMII ports per board, DIM-E offers a cost effective and hassle free solution which requires much less connecting wires between tester and target verification platform.

Features

  • Same test cases created once and automatically run on various verification environments (RTL, emulation and acceleration) without modification.

  • 100% Functional-equivalent to behavioral DIM.

  • Fully adjustable clock.

  • A new class of verification IP for emulatable test case automation.

    • Hardware DMA for best performance.

    • Fully Software control down to cycle-accuracy.

    • Same test case runs on an emulator as well as with a Verilog simulator.

    • Running simulation regression on an emulator, including normal, corner and error test cases.

  • PCI Express DIM () is available.

    • Fully Complied to PCIE standards.

    • Most Automated VIP - high-level control in SDL.

    • Multi-Threaded - A must for packet-based CPU transactions.

  • Ethernet X/G/MII DIM is available.

    • Scalable per port and link.

    • Emulatable.

  • PCI  DIM is available

  • Development tool kit for different interfaces is available.

    • For high-performance bus interfaces, such as SPI-4, Hyper-Transport, SATA, and Fibre Channel.

    • PCI interface to a Linux machine for emulatable DIMs. (click here for more information)

Introduction
Draco Architecture
System Description Language
Test Scenario Generator
Predicate-based Random Test Generator
Automatic Driver Generator
Dynamic Simulation Control
Assertion Model Builder
Design Interface Module
Co-simulation