With the old PCI bus, a read or write bus cycle is atomic PCI Express is more complicated. A read may requires multiple completion packets to complete the read request., In reality, multiple reads from different threads may mixed together. This is especially true for endpoint devices that support IO Virtualization. Do you plan to verify such scenario on your ASIC? If you answer yes, your verification environment must be multi-threaded.
PCIE-VR adopts the same programming environment in as the default. It can also be used with any other multi-thread environment or kernel, such as SystemC or Linux Posix thread via callback functions.
Multi-Threaded Programming Interface for Realistic Scenario Generation